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Assistant Professor Rajeev Barua (ECE/ISR) is a co-principal investigator for a new National Science Foundation Information Technology Research grant. Parallel Random-Access Model (PRAM)-On-Chip is a five year, $700K grant that addresses the concrete open problem, "Can a breakthrough high-end parallel computer be built, through truly designing a machine that can look to a programmer like a PRAM?" Electrical and Computing Department Professor Uzi Vishkin is the principal investigator.
Other co-PIs along with Barua are Bruce Jacob, Manoj Franklin and Gang Qu, all of the ECE Department. The magnitude of the algorithmic knowledge base that has been developed for the PRAM (Parallel Random-Access Model, or "Machine'') algorithmic model makes it a serious alternative to the serial algorithmic theory. Eluding a solution for several decades, the problem of building a general-purpose parallel computer that is significantly faster than its serial counterpart has been a major open problem for computer science since the inception of the field. This research will provide the backbone in the development of a holistic computation framework, called Explicit Multi-Threading (XMT) that seeks to resolve this long-standing problem.
September 2, 2003
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